X-Git-Url: https://code.wpia.club/?a=blobdiff_plain;f=lib%2Fopenssl%2Fcrypto%2Faes%2Fasm%2Faes-ia64.S;h=f7f1f63c9dfa134ccc2d92875bde7e0ed6c3827e;hb=02ed66432c92de70694700164f986190aad3cbc5;hp=7f6c4c366291c86c1214b726918757132b4eafa3;hpb=89016837dcbf2775cd15dc8cbaba00dc6379f86e;p=cassiopeia.git diff --git a/lib/openssl/crypto/aes/asm/aes-ia64.S b/lib/openssl/crypto/aes/asm/aes-ia64.S index 7f6c4c3..f7f1f63 100644 --- a/lib/openssl/crypto/aes/asm/aes-ia64.S +++ b/lib/openssl/crypto/aes/asm/aes-ia64.S @@ -1,3 +1,10 @@ +// Copyright 2004-2016 The OpenSSL Project Authors. All Rights Reserved. +// +// Licensed under the OpenSSL license (the "License"). You may not use +// this file except in compliance with the License. You can obtain a copy +// in the file LICENSE in the source distribution or at +// https://www.openssl.org/source/license.html +// // ==================================================================== // Written by Andy Polyakov for the OpenSSL // project. Rights for redistribution and usage in source and binary @@ -10,7 +17,7 @@ // 'and' which in turn can be assigned to M-port [there're double as // much M-ports as there're I-ports on Itanium 2]. By sacrificing few // registers for small constants (255, 24 and 16) to be used with -// 'shr' and 'and' instructions I can achieve better ILP, Intruction +// 'shr' and 'and' instructions I can achieve better ILP, Instruction // Level Parallelism, and performance. This code outperforms GCC 3.3 // generated code by over factor of 2 (two), GCC 3.4 - by 70% and // HP C - by 40%. Measured best-case scenario, i.e. aligned